Logic minimization algorithms for VLSI synthesis /

Logic minimization algorithms for VLSI synthesis /

Wedi'i Gadw mewn:
Manylion Llyfryddiaeth
Awduron Eraill: Brayton, Robert K. (Robert King)
Fformat: Llyfr
Iaith:English
Cyhoeddwyd: Boston : Kluwer Academic Publishers, c1984.
Cyfres:Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing.
Kluwer international series in engineering and computer science ; SECS 2.
Pynciau:
Logic design.
Integrated circuits > Very large scale integration.
Integrated circuits > Design and construction > Data processing.
Algorithms.

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