Evaluating a chip, wafer, or lot using SUXES, SPICE, and STAT2 /

Evaluating a chip, wafer, or lot using SUXES, SPICE, and STAT2 /

Wedi'i Gadw mewn:
Manylion Llyfryddiaeth
Prif Awdur: Marshall, J. C. (Janet C.)
Awdur Corfforaethol: National Institute of Standards and Technology (U.S.)
Awduron Eraill: Mattis, Richard L.
Fformat: Llyfr
Iaith:English
Cyhoeddwyd: Gaithersburg, MD : Washington, DC : U.S. Dept. of Commerce, Technology Administration, National Institute of Standards and Technology ; For sale by the Supt. of Docs., U.S. G.P.O., 1992.
Cyfres:Semiconductor measurement technology
NIST special publication ; 400-90
Pynciau:
SPICE (Computer file)
Metal oxide semiconductors, Complementary > Computer simulation.
Disgrifiad
Disgrifiad o'r Eitem:"April 1992."
Disgrifiad Corfforoll:iv, 140 p. : ill. ; 28 cm.
Llyfryddiaeth:Includes bibliographical references (p. 41-42)

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