http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
Area array packaging processes for BGA, Flip Chip, and CSP
Machine derived contents note: Introduction -- Next Generation Flip Chip Materials and Processes -- Concepts -- Cost Analysis -- High-Throughput FC Processing Using No-Flow Analysis -- Wafer-Level FC Processing -- Analysis of Next Generation FC Processes -- Compression Flow Placement Model & Analysis -- Modeling and Analysis of Chip Floating -- Flip Chip Assembly and Underfilling -- Process Overview -- Substrate Design -- Assembly with Capillary Flow Underfill -- Assembly with Fluxing Underfills -- Water-Applied Underfills -- Reliability -- BGA and CSP Rework -- Rework Process Considerations -- Basic Network Setups -- Identification of Process Yield Problems -- Component Reballing Considerations -- Analysis Using X-Ray Inspection -- BGA Assembly Reliability -- BGA and QFP Comparison -- BGA Thermal Cycling -- CBGA Failure Mechanisms -- PBGA Failure Mechanisms -- Shock and Thermal Cycling -- BGA Conclusions for Quality and Reliability Programs -- Die Attach and Rework -- Polymer Basics -- Die-Attach Materials -- Die-Attach Application Methods -- Applications -- Properties -- Reliability -- Rework -- Liquid Encapsulation Equipment and Processes -- Encapsulation Materials -- Encapsulation Methods -- Platform Design and Construction -- Dispensing Head -- Needles -- Pumps -- System Control -- Molding for Area Array Packages -- Molding Materials -- Transfer Molding Equipment -- Molding Processes -- Tooling -- Productivity and Cost -- Reliability -- References -- Contributors and Affiliations.
Includes bibliographical references and index.