LEADER 01594nam a2200349 a 4500
001 c000014563
003 CARM
005 00000000000000.0
008 890427s1989 maua b 00110 eng
019 1 |a 6471200  |5 LACONCORD2021 
020 |a 0792390253 
035 |a (OCoLC)19723668  |5 LACONCORD2021 
040 |d SCAE 
050 0 0 |a TK7874  |b .C525 1989 
100 1 |a Cheng, Kwang-Ting,  |d 1961- 
245 1 0 |a Unified methods for VLSI simulation and test generation /  |c by Kwang-Ting Cheng and Vishwani D. Agrawal. 
260 |a Boston :  |b Kluwer Academic Publishers,  |c c1989. 
300 |a xii, 148 p. :  |b ill. ;  |c 24 cm. 
440 0 |a Kluwer international series in engineering and computer science.  |p VLSI, computer architecture, and digital signal processing  |v #SECS 73 
500 |a At head of title: AT&T. 
500 |a Includes index. 
504 |a Bibliography: p. [113]-143. 
650 0 |a Integrated circuits  |x Very large scale integration  |x Design and construction  |x Data processing. 
650 0 |a Computer-aided design. 
650 0 |a Integrated circuits  |x Very large scale integration  |x Testing. 
650 0 |a Integrated circuits  |x Very large scale integration  |x Computer simulation. 
700 1 |a Agrawal, Vishwani D.,  |d 1943- 
740 0 1 |a Unified methods for very large scale integration simulation and test generation. 
852 8 |b CARM  |h A2:AJ21F0  |i C04643  |p 0190828  |f BK 
082 0 4 |a 621.39/5  |2 20 
999 f f |i 81772db1-e2cb-5004-a3f1-cfe776c370eb  |s 5704725d-e970-5f66-91a4-51b9a412687b 
952 f f |p Can circulate  |a CAVAL  |b CAVAL  |c CAVAL  |d CARM 1 Store  |e C04643  |f A2:AJ21F0  |h Other scheme  |i book  |m 0190828