APA (7th ed.) Citation

Rao, V. B. (1989). Switch-level timing simulation of MOS VLSI circuits. Kluwer Academic Publishers.

Chicago Style (17th ed.) Citation

Rao, Vasant B. Switch-level Timing Simulation of MOS VLSI Circuits. Boston: Kluwer Academic Publishers, 1989.

MLA (8th ed.) Citation

Rao, Vasant B. Switch-level Timing Simulation of MOS VLSI Circuits. Kluwer Academic Publishers, 1989.

Warning: These citations may not always be 100% accurate.